What are Parallel Adder and Parallel Subtractor and Their Working

Additions and subtractions are fundamental operations in a digital system, control system & digital signal processing. These systems are influenced by the adders and subtractors by providing accurate as well as fast operations. Adders and subtractors play an essential role in digital systems due to their wide usage in other digital operations like multiplication, subtraction & division. Therefore, improving the performance of these will progress the execution of binary operations within a circuit. The digital circuit performance can be estimated by evaluating its operating speed, layout area, and power dissipation. This article discusses an overview of the parallel adder and parallel subtractor.

What are Parallel Adder and Parallel Subtractor?

The parallel adder and parallel subtractor mainly discuss its definitions, working, advantages and disadvantages.

What is a Parallel Adder?

A digital circuit that is used to perform the addition of two binary numbers & an i/p carry, where the length of one bit is larger than another bit and operates in parallel with equivalent pairs of bits. The arrangement of parallel adder can be done by arranging the full adders (FAs) in a chain model where the carry o/p from every full adder (FA1) can be linked to the carry i/p of the next full adder (FA2) within the chain. The diagram of the parallel adder is shown below.

The operation of an n-bit parallel adder can be done by using n-full adders. Similarly, for the 2-bit parallel adder, two adders are required. Generally, these adders include the logic of carry look ahead to make sure that the propagation of carrying among the addition of the next stage doesn’t restrict the speed of addition.

Working of Parallel Adder

The parallel adder diagram is shown above. In that, the first full adder like FA1, the sum like ‘S1’ can be generated by adding A1 & B1 with the carry ‘C1’.The ‘C2’ carry is connected to the second adder in the chain.

After that, the second full adder like FA2 uses ‘C2’ carry bit to insert the A2 & B2 input bits to produce the sum S2 & C3 carry. Similarly, this process continues for the remaining full adders till the nth full adder uses Cn carry bit to insert its inputs like An & Bn to produce the final bit of the o/p with Cout (last carry bit).

What is a Parallel Subtractor?

A digital circuit that is used to calculate the arithmetic difference between two binary pairs of bits is known as a parallel subtractor. Here in binary bits, the length of one bit is higher than other bits. The designing of this subtractor can be done in different ways like a combination of all full subtractors or half & full subtractors or all FAs with the i/p of subtrahend complement. The diagram of the parallel subtractor is shown below.

In the n-bit parallel subtractor, the desired o/p can be achieved by cascading the n full subtractors. The connection of this is similar to the 4-bit parallel adder. The subtraction of this can be done from each bit to its parallel bit. If a borrow is generated, then it propagates during the cascade of full subtractor.

Working of Parallel Subtractor

As shown in the above parallel subtractor diagram, the subtractor can be arranged with a combination of all FAs with the subtrahend complement i/p.

The procedure of subtraction can be done by considering the addition of minuend with subtrahend’s 2’s complement. So that parallel subtraction can be done.

The two’s complement of a number can be done by converting the binary number into 1’s complement. Here 1’s complement is to negate the binary number. Here, by adding 1 to LSB bit of 1’s complement, 2’s complement can be attained.

By using logic gates, the 1’s complement of ‘B’ can be attained through the NOT logic gate & ‘1’ is added throughout the carry to get the 2’s complement of ‘B’. Further, this is added to ‘A’ to perform the arithmetic subtraction.

This procedure will continue till the final full adder like ‘FAn’ and it utilizes the carry bit ‘Cn’ to include with its i/p ‘An’ as well as 2’s complement of ‘Bn’ to produce the final o/p bit with final carry bit ‘Cout’.

Advantages

The advantages of a parallel adder and subtractor include the following.

• The operation of this adder or subtractor is faster when contrasted to serial adder or subtractor.
• The required time for addition doesn’t depend on the digit of bits.
• All the bits in this are added or subtracted at a time, so the o/p will be in parallel form.
• It is not expensive.
• These are faster compared with serial counterparts.

Disadvantages of Parallel Adder/Parallel Subtractor

The disadvantages of a parallel adder and subtractor include the following.

• In a chain process, each full adder must wait for the carry of the previous adder.
• Every adder/subtractor in the chain process will get inputs to their ports instantly. But, the ports like a carry or borrow don’t acquire their i/ps till the previous adder/subtractor completes their process.
• So delay will have occurred so it adds up once the no. of FAs or full subtractors increases.
• It does not include earlier carry in the process of addition.
• Therefore it doesn’t suitable for cascading used in Multi-bit addition.
• Once FAs are used within a chain arrangement, then the capability of output drive can be reduced.

FAQs

1). What is the adder?

A digital circuit which is used to perform an addition of numbers

2). What is subtractor?

An electronic logic circuit used to calculate the dissimilarity among two binary numbers.

3). What are the different types of adders?

They are half adders, full adders, and multi-bit adders.

4). What are multi-bit adders?

They are serial adders and parallel adders.

Thus, this is all about an overview of the parallel adder and subtractor, and their advantages and disadvantages. Adders, as well as subtractors, are widely used in the Arithmetic logic unit of a computer to calculate addition and in CPU and GPU for the applications of graphics to decrease the complexity of the circuit. Here is a question for you, what is the difference between adder and subtractor?