SMBus : Working, Differences & Its Applications

The SMBus was launched in the year 1995 by Intel and it is based on the I²C serial bus protocol of Philips. This bus carries data, CLK & instructions where the clock frequency ranges from 10 kHz to 100 kHz. The main intention of SMBus is to allow an inexpensive and powerful method to control and get data from devices on a motherboard. SMBus is normally used in PCs for temperature control, smart batteries & other low bandwidth system management communication.

This bus identifies the communication link between a charger, an intelligent battery & a microcontroller that converses with the rest of the system. But, SMBus is also used to connect different devices like system sensors, power-related devices, communications devices, inventory EEPROMs, etc. This article discusses an overview of an SMBus – working with applications.

What is SMBus Protocol?

The SMBus (System Management Bus) is a 2-wire interface, frequently used in between various devices on a motherboard for low-speed system management communication. This kind of bus was designed by the I2C protocol foundations. So both the I2C & SMBus may have some similarities and they can also inter-operate on the similar bus.

This bus works on the I2C operation principles which provide a control bus, especially for the system to allow messages to or from the devices rather than using separate control lines for reducing system wires & pin count.

A device with an SMBus can provide the information of manufacture, informs the system of its part or model number, reports different kinds of errors, allow control parameters, and revisit its position.

SMBus Specification

The specification of SMBus simply refers to 3 kinds of devices host, master & slave.

• A host is a particular master and it provides the main interface to the CPU of the system.
• A master device that issues instructions, generates the clocks & terminates the transfer.
• A slave device receives otherwise reacts to a command.

How Does SMBus Works?

There are 3 kinds of devices used within SMBus communication like a host, a master & a slave device which are shown in the following diagram. In this bus, the host device is a specific master work-like interface to the CPU of the system; however, it is not necessary always. Some systems like simple battery charging systems can be without a host.

A master device begins the communication, drives the CLK & stops the transfer. A device may be selected to be simply a master or a master-slave, where it can work either as a master device otherwise a slave device.

On SMBus, there is also above one master, however only one can master the bus at any given time. For example, when the two devices master the bus at once, then SMBus provides an arbitration mechanism that simply depends on the wired-AND connection of all interfaces of the SMBus device to the SMBus.

Slave devices respond to its address as well as commands and they can transmit and receive data from and to a master device. A device can be selected totally as a slave otherwise it is achievable for the slave to work like a master in certain examples.

Similar to the I2C protocol, every slave on this bus is simply allocated with a seven-bit slave address where the read or write bit is appended to this address to describe whether the device is reading or writing the message being transmitted on the bus.

Devices are necessary to recognize their own address, thus once a device identifies its address, then it will react to the command.

When the slave address of this bus conflicts, then it supports ARP or Address Resolution Protocol. Once the host notices two devices with a similar slave address, then the address resolution protocol procedure will assign a new unique address dynamically to the slaves. Address resolution protocol will allow the devices to be utilized immediately without the requirement to start again the system.

This bus utilizes 2-wires for communication like the SMBDAT wire & SMBCLK wire where the SMBDAT wire is used to transfer serial data & the SMBCLK wire works like the serial clock. In the above SMBus, the master simply drives the SMBCLK that ranges from 10 to 100 kHz, however, any line can drive the SMBDAT.

These two wires are bidirectional which provides an option to include an alert signal like SMBALERT that allows devices to request attention from the host.

The data packet of this bus contains a Start bit, an ACK or NACK bit, 8 bits of data & a Stop bit. The data transfer of SMBus uses some of the functions otherwise protocols of different SMBus while sending messages like Send Byte, Quick Command, Read Word, Write Byte, Read Byte, Write Word, Process Call, Block Write, Block Read, Read Process Call & Block Write-Block.

This bus also supports PEC (packet error checking) to improve communication reliability. So this can be performed by including a packet error code at the end of every message.

Functions

SMBus functions are also called protocols. So the main protocols of SMBus are Quick Command, Send Byte, Receive Byte, Write Byte, Read Byte, Process Call, Block Write/Read Block Write-Block Read Process Call, SMBus Host Notify Protocol, Write-32 Protocol, Read-32 Protocol, Write 64-Protocol & Read 64 Protocol.

SMBUS Message Format

After the condition of START, the master will locate the slave device’s 7-bit address and it needs to address on the bus. So, the length of the address is 7 bits long followed by an 8-bit signifying the data transfer direction (R/W); a ONE specifies a request for READ (data) & a ZERO specifies a WRITE (transmission).

The transfer of data is terminated always by a STOP condition generated through the master.

Each byte includes 8 bits and each byte is transferred on the SMBus and should be followed through an acknowledge bit. Bytes are transmitted through the MSB (most significant bit) first.

A typical SMBus device includes a set of commands through which data can be simply read & written. The length of all these commands is 1 byte long whereas their arguments, as well as return values, can change within the length.

Allowing a command does not exist otherwise it is not supported, so it may cause an error condition. In compliance with the SMBus specification, the MSB is first transferred.

First, all the commands set a start condition over the bus, after that start the transmission through transmitting the data or command, wait for an acceptance from the slave device throughout the data or command transmission, then sets a stop condition on the bus.

Start and Stop Conditions for SMBus Protocol

START & STOP condition of a message will be defined by two unique bus conditions high to low and low to high.

In a HIGH to LOW SMBDAT line transition, when the SMBCLK is HIGH then it indicates a START condition of a message.

In a LOW to HIGH SMBDAT line transition, when SMBCLK is HIGH then it defines a STOP condition of a message. So these two conditions are generated always by the master of the bus. The bus gets busy after the condition of a START. The bus will again become idle after a certain time following a STOP condition.

SMBus Hardware Requirements

The hardware requirements of SMBus for enabling efficient, as well as seamless communication in between a PC & some of its most essential hardware, are two wires like SMBDAT & SMBCLK, PSU (Power Supply Unit), set of ICs, drivers & its cooling fans. Basically, this SMBus Controller allows a computer to handle & execute commands successfully such as turning ON its PSU & controlling its cooling fans.

SMBus data transfer uses different protocols or functions while transferring messages like Send Byte, Quick Command, Write Byte, Read Byte, Write Word, Read Word, Block Read, Process Call, Block Write, etc. It also supports PEC or packet error checking for enhancing communication reliability by simply including a packet error code at each message end.

The SMBus hardware simply provides timing & shifting control used for the serial transfers. So the hardware of SMBus performs the different independent application tasks like timing control, serial data transfers, and recognition of slave addresses.

SMBus Vs I2C

The difference between SMBus and I2C includes the following.

SMBus Vs Pmbus

The difference between SMBus and Pmbus include the following.

Timing Diagram

The SMBus timing diagram is shown below.

The TLOW.SEXT is the slave device that extends the CLK cycles within a single message from the START to STOP. So it is feasible that, the master or another slave device will also extend the CLK cycle to cause the low extended time of combined CLK to be higher than TLOW.SEXT. Thus, this parameter is simply measured through the slave device like the single target of a full-speed master.

TLOW.MEXT is the master device that extends the CLK cycles in every byte of a message. So it is feasible that another master or a slave device will also extend the CLK to cause the low time of the combined CLK to be higher as compared to TLOW.MEXT on a specified byte. Thus, the parameters are simply measured through a full-speed slave device like the single target of the master.

Applications

The applications of SMBus include the following.

• SMBus is used as a system component chip used to communicate within a system. More particularly, it allows batteries for communicating with other components of the system like power-related components & the CPU.
• This is used for lightweight communication.
• This bus is used for monitoring critical parameters in embedded systems & on motherboards of PC.
• This is the most common type of communication for advanced fuel gauges of Texas Instruments.
• This is utilized in less bandwidth-based system management communication.

Thus, this is all about an overview of an SMBus – working with applications. This is a simple and single-ended two-wire bus used for lightweight communication. This bus is used in motherboards of computers for communication with the power source for ON or OFF instructions. Here is a question for you, what is the I2C protocol?