RTC DS1307 – Pin Description, Features & Working of DS1307

What are Real Time Clocks?

Real time clocks (RTC), as the name recommends are clock modules. The DS1307 real time clock (RTC) IC is an 8 pin device using an I2C interface. The DS1307 is a low-power clock/calendar with 56 bytes of battery backup SRAM. The clock/calendar provides seconds, minutes, hours, day, date, month and year qualified data. The end date of each month is automatically adjusted, especially for months with less than 31 days.

They are available as integrated circuits (ICs) and supervise timing like a clock and also operate date like a calendar. The main advantage of RTC is that they have an arrangement of battery backup which keeps the clock/calendar running even if there is power failure. An exceptionally little current is required for keeping the RTC animated. We can find these RTCs in many applications like embedded systems and computer mother boards, etc. In this article we are going to see about one of the real time clock (RTC), i.e. DS1307.

Pin Description of DS1307:

Pin 1, 2: Connections for standard 32.768 kHz quartz crystal. The internal oscillator circuitry is intended for operation with a crystal having a specified load capacitance of 12.5pF. X1 is the input to the oscillator and can alternatively be connected to an external 32.768 kHz oscillator. The output of the internal oscillator, X2 is drifted if an external oscillator is connected to X1.

Pin 3: Battery input for any standard 3V lithium cell or other energy source. Battery voltage should be between 2V and 3.5V for suitable operation. The nominal write protect trip point voltage at which access to the RTC and user RAM is denied is set by the internal circuitry as 1.25 x VBAT nominal. A lithium battery with 48mAhr or greater will backup the DS1307 for more than 10 years in the absence of power at 25ºC. UL recognized to ensure against reverse charging current when utilized as a part of conjunction with a lithium battery.

Pin 4: Ground.

Pin 5: Serial data input/output. The input/output for the I2C serial interface is the SDA, which is open drain and requires a pull up resistor, allowing a pull up voltage upto 5.5V. Regardless of the voltage on VCC.

Pin 6: Serial clock input. It is the I2C interface clock input and is used in data synchronization.

Pin 7: Square wave/output driver. When enabled, the SQWE bit set to 1, the SQW/OUT pin outputs one of four square-wave frequencies (1Hz, 4 kHz, 8 kHz, and 32 kHz). This is also open drain and requires an external pull-up resistor. It requires application of either Vcc or Vb at to operate SQW/OUT, with an allowable pull up voltage of 5.5V and can be left floating, if not used.

Pin 8: Primary power supply. When voltage is applied within normal limits, the device is fully accessible and data can be written and read. When a backup supply is connected to the device and VCC is below VTP, read and writes are inhibited. However at low voltages, the timekeeping function still functions.

Features:

Programmable square wave output signal
Automatic power-fail detect and switch circuitry
Consumes less than 500nA in battery backup mode with oscillator running
Available in 8-pin DIP or SOIC
Underwriters Laboratory (UL) recognized
Real-time clock (RTC) counts seconds, minutes, hours, date of the month, month, day of the week, and year with leap-year compensation valid up to 2100
56-byte non-volatile RAM for data storage
Two-wire interface (I2C)

Using the DS1307 is primarily written to and read the registers of this chip. The memory contains all 64 DS1307 8-bit registers are addressed from 0 to 63 (from 00H to 3FH the hexadecimal system). The first eight registers are used for the clock register the remaining 56 vacant can be used as RAM contains temporary variable if desired. The first seven registers contain information about the time of the clock including: seconds, minutes, hours, secondary, date, month and year. The DS1307 include several components such as power circuits, oscillator circuits, logic controller and I2C interface circuit and the address pointer register (or RAM). Let’s see the working of DS1307.

Working of DS1307:

In the simple circuit the two inputs X1 and X2 are connected to a 32.768 kHz crystal oscillator as the source for the chip. VBAT is connected to positive culture of a 3V battery chip. Vcc power to the I2C interface is 5V and can be given using microcontrollers. If the power supply Vcc is not granted read and writes are inhibited.

START and STOP conditions are required when a device wants to establish communication with a device in the I2C network.

By providing a device identification code and a register address, we can implement the START condition to access the device.
The registers can be accessed in serial order until a STOP condition is implemented

The START condition and STOP condition when the DS1307 I2C communication with the microcontroller is shown in the figure below.

The device is configured mentioned in the figure below. The DS1307 has the 2-wire bus connected to two I/O port pins of the DS5000: SCL – P1.0, SDA – P1.1. The V_DD voltage is 5V, R_P = 5KΩ and the DS5000 is by means of a 12-MHz crystal. The other secondary device could be any other device that recognizes the 2-wire protocol, such as the DS1621 Digital Thermometer and Thermostat. The interface with the D5000 was skilled using the DS5000T Kit hardware and software. These development kits allow the PC to be used as a dumb terminal using the DS5000’s serial ports to substitute a few words with the keyboard and monitor.Typical 2-wire bus arrangement, the following bus protocol has been defined during data exchange information; the data line must remain stable whenever the clock line is high. Changes in the data line while the clock line is high will be interpreted as control signals.

Accordingly, the following bus conditions have been defined:

Start data transfer: A change in the state of the data line from high to low, while the clock line is high, defines a START condition.

Stop data transfer: A change in the state of the data line from low to high, while the clock line is high, defines the STOP condition.

Data valid: The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the high period of the clock signal. The data on the line must be changed during the low period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of data bytes transferred between the START and the STOP conditions is not limited, and is determined by the master device. The information is transferred byte-wise and each receiver acknowledges with a ninth bit.

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