Introduction to 8080 Microprocessor and its Architecture

The 8080 microprocessor was designed by Masatoshi Shima and Federico Faggin; Stan Mazor contributed for designing a chip. In the year 1972, the work on 8080 microprocessor was in progress and the CPU was released in April 1974. The original version of 8080 had a fault that it could drive low-power TTL devices only. After the fault was discovered, the updated version of the CPU-8080A was released by Intel, which could drive standard TTL devices.

The Intel 8080/808A was not object code it was well matched with the 8008, but its source code well matched with it. Similar to the 8008 microprocessor, the 8080 CPU has same interrupt processing logic. The maximum memory size on Intel microprocessor 8080 was increased from 16KB to 64KB. The microprocessor 8080 was very trendy, and it was second sourced by many companies. Genetic copies of the 8080 processor were made in Poland, USSR, CSSR, Romania and Hungary. Nowadays different types of microprocessors available which are advancement to this processor.

8080 Microprocessor

A microprocessor integrates the functions of computers CPU on a single IC. It is a programmable device that accepts the digital data as input, processes according to the commands stored in its memory and gives results as output. The history of the microprocessor from a technical point of view, focusing on different corporations and competitors of microprocessor involves various stages of embedded microprocessor design.

An 8080 microprocessor is an 8-bit parallel CPU, and this microprocessor is used in general purpose digital computer systems.It is made up on a single large-scale integration chip using Intel’s N-channel silicon gate MOS process. The microprocessor 8080 consists of 40 pins and it microprocessor transfers internal information and data through an 8- bit, bidirectional 3-state data bus (D0-D7). The peripheral device addresses and memory addresses are transmitted over a 16-bit 3-state address bus (A0-A15).

Six control and timing outputs WAIT, HLDA, WAIT, DBIN, SYNC and WR derive from the microprocessor 8080, while control inputs (HOLD, READY, RESET, (WR) ̅ and INT), power inputs (+12, +5, -5 and GND), and clock inputs ( ∅1 and ∅2 ) are accepted by the 8080.

8080 Microprocessor’s Architecture

The functional blocks of the microprocessor 8080 is shown in the above architecture, and its CPU consists of the following functional units:

• Address Logic and Register Array
• Arithmetic and Logic Unit
• Control Section and Instruction Register
• Bi directional, 3 State Data Bus Buffer

Arithmetic and Logic Unit

The ALU includes the following registers:

• An 8-bit Accumulator
• An 8-bit Temporary Accumulator (TMP)
• An 8-bit Temporary Register
• A Flag Register

Arithmetic, logical and rotate operations are performed in the ALU. The arithmetic and logic unit is fed by the registers’ temporary accumulator, carry flip flop and TMP register. The result of the process can be transmitted to the accumulator; similarly, the ALU also feeds the flag register. The TMP register gets information from the internal bus, and then sends the data to the ALU and also to the flag register. The accumulator can be loaded from the internal bus, and the ALU and it transfers data to the temporary accumulator. The inside of the auxiliary carry flip flop and accumulator are tested for decimal correction by executing a Decimal Adjust for Addition instruction.

Instruction Set

The 8080 microprocessor instruction set includes five different categories of instructions:

• Data Moving Group: Data moving instruction transfers data between registers or among memory and registers.
• Arithmetic Group: Arithmetic group instructions Add, subtract, increment, or decrement data into memory or in registers.
• Logical Group: Logical group instruction AND, OR, EX-OR, compare, complement or rotates data into registers or in memory.
• Branch group: It is also called as control transfer instruction. It includes Conditional, unconditional, return instructions, and sub routine call instructions and restarts.
• Stack, machine and I/O group: This instruction includes I/O instructions, as well as instructions for maintaining the stack and internal control flags

Instruction and Data Formats

The memory of 8080 microprocessor is organized into 8-bit quantities, called bytes. Each byte has an exclusive 16-bit binary address related to its sequential position in the memory. The 8080 may also consist of ROM (read only memory) elements and RAM (random access memory) elements, and the microprocessor can directly address up to 65,536 bytes of memory.

Data in 8080 microprocessor is stored in the form of 8-bit binary digits.

When a register includes a binary number, it is essential to find the order in which bits of the number are written. In the Intel 8080 microprocessor, BIT 0 is refered to as LSB, and the BIT 7 as the MSB.

The 8080 microprocessor program instructions may be one byte, two or three bytes in length. Different byte instructions have to store in successive memory locations. The address of the first byte is always used as the address of the instructions. The correct instruction format depends on the particular operation to be executed.

Memory

The total addressable memory of the microprocessor is 64KB, and the stack program and data memories occupy the same memory space.

• In program memory, program can be placed anywhere in the memory; call, jump and branch instruction can use 16-bit addresses, i.e., they can be used to branch/jump anywhere within the 64KB memory. All these instructions use complete addressing.
• In the data memory, the processor always uses 16-bit addresses so that the data can be located anywhere.
• Stack memory is incomplete only by the size of memory, stack raises down.

Condition Flags

Flag is an 8-bit register having five 1-bit flags. There are five types of flags associated with the implementation of instructions on the microprocessor 8080. They are sign, zero, parity, carry and auxiliary carry, and these flags are represented by a 1-bit register in the CPU. A flag is set by forcing the bit to 1, and reset by forcing the bit to 0.

• Zero Flag: If the result of an instruction has the value ‘0’, this zero flag is set; or else, it is reset.
• Sign Flag: If the MSB bit of an instruction has the value ‘1’, this flag is set; or else, it is reset.
• Parity Flag: If the number of the set bits in the result has even value, this flag is set; or else, it is reset.
• Carry Flag: If there was a carry during borrow, addition, subtraction or comparison, this flag is set; or else, it is reset.
• Auxiliary Carry: If there was a carry out from 3-bit to 4-bit of the result, this flag is set; otherwise, it is reset.

Interrupts

The processor maintains maskable interrupts. When an interrupt arises, the processor fetches one instruction from the bus; frequently one of these instructions:

• In RST instructions (RST0 – RST7), the processor saves current program counter into stack and branches to memory location N * 8 (where N is a 3-bit number from 0 to 7 supplied with the RST instruction).
• CALL instruction is a 3-byte instruction, wherein the processor calls the subroutine, address of which is particular in the second and third bytes of the instruction.

By using EI and DI instructions, the interrupts can be enabled or disabled.

Thus, Intel 8080 microprocessor is a successor to the Intel 8008 CPU. The original version of the microprocessor had a fault. After the error was noticed, Intel released updated version of the CPU which could drive standard TTL devices. This is about the 8080 microprocessor, and its architecture. Based on the information given here in this article, the readers are encouraged to post their suggestions, feedbacks and comments in the comment section given below.

Photo Credits:

• 8080 Microprocessor by antiquetech
• Architecture of Microprocessor 8080 by blogspot