Introduction to Application Specific Integrated Circuit (ASIC)

In our day to day life, we come across various types of electronic gadgets. One of the technologies that brought forth a revolution in the production of electronics is “Integrated Circuit“. This technology reduced the size of electronic products by increasing the density of logic gates per chip. Today we have different types and configurations of IC’s. As we observe around we find that some ICs can be used only for one specific application while some ICs can be reprogrammed and used for various applications. These types of ICs are named as ASICs. But how do they differ? How is it possible to reprogram them? Why some ICs can’t be reprogrammed? Hop on to find answers to these questions.

What is An ASIC(Application Specific Integrated Circuit)?

ASIC full form is Application Specific Integrated Circuit. These circuits are application specific .i.e. tailored made ICs for a particular application. These are usually designed from root level based on the requirement of the particular application. Some of the basic application-specific integrated circuit examples are chips used in toys, the chip used for interfacing of memory and microprocessor etc…These chips can be used only for that one application for which these are designed. Presumably, these types of ICs are preferred only for those products which have a large production run. As ASICs are designed from the root level they have high cost and are recommended only for high volume productions.

The main advantage of ASIC is reduced chip size as a large number of functional units of a circuit are constructed over a single chip. Modern ASIC generally includes a 32-bit microprocessor, memory blocks, network circuits etc…Such type of ASICs is known as System on Chip. With the development in manufacturing technology and increased research in design methods, ASICs with different levels of customization are developed.

Types of ASIC

ASICs are categorized based on the amount of customization a programmer is allowed to do on a chip.

Full Custom

In this type of design all the logic cells are tailored made for specific application .i.e. designer has to specially make the logic cells for the circuits. All the mask layers for interconnection are customized. So programmer can’t change interconnections of the chip and while programming he has to be aware of the circuit layout.

One of the best examples of Full custom ASIC is a microprocessor. This type of customization allows designers to built various analog circuits, optimized memory cells, or mechanical structures on a single IC. This ASIC is costly and very time consuming to manufacture and design. The time is taken to design these ICs is around eight weeks.

These are usually intended for high-level applications. Maximum performance, minimized area and highest degree of flexibility are major features of Full custom design. Eventually, the risk is high in design as the logic cells, resistor etc… circuit elements used are not pretested.

Semi-Custom

In this type of design logic cells are taken from standard libraries .i.e. they are not handcrafted as in Full custom design. Some masks are customized while some are taken from the predesigned library. Based on the type of logic cells taken from the library and amount of customization allowed for interconnects these ASICs are divided into two types- Standard cell-based ASIC and Gate Array-based ASIC.

1). Standard cell-based ASIC

To know these IC first let us understand what a standard cell library stands for. Some of the logic cells such as AND gates, OR gates, multiplexers, flip-flops are predesigned by designers using different configurations, standardized and stored in the form of a library. This collection is known as standard cell library.

In standard cell-based, ASIC logic cells from these standard libraries are used. On the ASIC chip standard cell area or flexible block are made up of standard cells arranged in the form of rows. Along with these flexible blocks mega cells like microcontrollers or even microprocessors are used on-chip. These mega cells are also known as Mega functions, system level macros, fixed blocks, Functional standard blocks.

Above figure represents a standard cell ASIC with a single standard cell area and four fixed blocks. Mask layers are customized. Here designer can place standard cells anywhere on the die. These are also known as C-BIC.

2). Gate Array Based ASIC 

This type of semi-custom ASIC have predefined transistors on the silicon wafer .i.e. the designer cannot change the placement of the transistors present on the die. Base array is the predefined pattern of the gate array and the base cell is the smallest repetitive cell of the base array.

The designer only has liability to change interconnection between transistors using the first few metal layers of the die. The designer chooses from the gate array library. These are often called as Masked Gate Array. Gate Array Based ASIC are of three types. They are Channeled Gate Array, Channel less gate array and a structured gate array.

a).Channeled Gate Array

In this type of gate array, wiring space is left between rows of transistors. These are similar to CBIC as space is left for interconnection between blocks but in channeled gate array cell rows are fixed in height whereas in CBIC this space can be adjusted.

Some of the main features of this gate array are- this gate array uses predefined spaces between rows for interconnection. Manufacturing time is two days to two weeks.

b). Channel Less Gate Array

There is no free space left for routing between rows of cells as seen in the channeled gate array. Here routing is done from above the gate array cells as we can customize the connection between the metal 1 and transistors. For routing, we leave the transistors lying in the path of routing unused. The manufacturing lead time is about two weeks.

c). Structured Gate Array

This type of gate array has an embedded block along with gate array rows as seen above. Structured gate array has a higher area efficiency of CBIC. Like Masked gate array these have lower cost and faster turnaround. Here the fixed size of the embedded function poses a limitation on the structured gate array. For example, is this gate array contains an area reserved for 32k bit controller but if in an application we only require an area for 16k bit controller the remaining area gets wasted.All the gate array have a turnaround time of two days to two weeks and all have customized interconnect.

Programmable ASIC

There are two types of programmable ASICs. They are PLD and FPGA

PLDs (Programmable Logic Devices)

These are the standard cells readily available. We can program a PLD to customized a part of the application, so they are considered as ASIC. We can use different methods and software to program a PLD. These contain a regular matrix of logic cells usually programmable array logic along with flip-flops or latches. Here interconnects are present as a single large block.
PROM is a common example of this IC. EPROM uses MOS transistors as interconnect so by applying high voltage we can program it. PLDs have no customized logic cells or interconnect. These have a fast design turnaround.

FPGAs (Field Programmable Gate Array)

Where PLDs have programmable array logic as logic cells FPGA has gate array-like arrangement. PLDs are smaller and less complex than FPGAs. Due to its flexibility and characteristics, FPGA is replacing TTL in microelectronic systems. Design turnaround is only a few hours.

The core consists of programmable basic logic cells which can perform both combinational and sequential logic. We can program logic cells and interconnect using some methods. Basic logic cells are surrounded by the matrix of programmable interconnects and the core is surrounded by programmable I/O cells.

FPGA usually comprises of configurable logic blocks, configurable I/O blocks, programmable interconnects, clock circuitry, ALU, memory, decoders.

We have seen the different types of ASIC available. Now let’s understand when all these customizations and interconnects are done during manufacturing.

Application Specific Integrated Circuit (ASIC) Design Flow

Designing an ASIC is carried out in step by step manner. This order of steps is known as ASIC Design Flow. Steps of design flow are given in below flow chart.

Design Entry: At this step, the microarchitecture of the design is implemented using hardware description languages such as VHDL, Verilog and System Verilog.
Logic Synthesis: At this step a netlist of logic cells to be used, types of interconnections and all other parts required for the application is prepared using HDL.
System Partitioning: At this step, we divide the largely sized die into ASIC sized pieces.
Pre-Layout Simulation: At this step, a simulation test is done to check whether the design contains any errors.
Floor Planning: At this step blocks of netlist are arranged on the chip.
Placement: At this step location of cells inside the block is decided.
Routing: At this step, connections are drawn between blocks and cells. Extraction: At this step, we determine the electrical properties like resistance value and the capacitance value of interconnect.
Post-Layout Simulation: Before the submission of the model for manufacturing this simulation is done to check whether the system functions properly along with a load of interconnect.

Examples of ASIC

Having known the different characteristics of ASIC now let us see some examples of ASIC.
Standard cell-based ASIC: LCB 300k, 500k from LSI Logic Company, SIG1, 2, 3 families from ABB Hafo Inc., GCS90K of GCS Plessey.
Gate Array Products: AUA20K from Harris Semiconductor, SCX6Bxx from National Semiconductors, TGC/TEC families from Texas Instruments.
PLD Products: PAL family of Advanced Micro Devices, GAL family from Philips Semiconductors, XC7300 and EPLD from XILINX.
FPGA Products: XC2000, XC3000, XC4000, XC5000 series from XILINX, pASIC1 of QuickLogic, MAX5000 from Altera.

Applications of ASIC

The uniqueness of ASIC has revolutionized the way electronics are manufactured. These reduced the die sizes while increasing the density of logic gates per chip. ASICs are usually preferred for high-level applications. ASIC chip is used as IP cores for satellites, ROM manufacturing, Microcontroller and various types of applications in the medical and research sectors. One of the trending applications of ASIC is BITCOIN MINER.

Bitcoin Miner

Mining of cryptocurrency requires larger power and high-speed hardware. A general purpose CPU cannot provide such a higher computing capacity at high speed. ASIC bitcoin miners are chips built into specially designed motherboards and power supplies, constructed into a single unit. It is a purposely designed hardware right down to the chip level for bitcoin mining. These units can execute the algorithm of only single cryptocurrency. For a different type of cryptocurrency presumably, we require another miner.

Advantages & Disadvantages of ASIC

The advantages of ASIC include the following.

• • The small size of ASIC makes it a high choice for sophisticated larger systems.

• • As a large number of circuits built over a single chip, this causes high-speed applications.

• • ASIC has low power consumption.

• • As they are the system on the chip, circuits are present side by side. So, very minimal routing is needed to connect various circuits.
  • ASIC has no timing issues and post-production configuration.

The disadvantages of ASIC include the following.

• • As these are customized chips they provide low flexibility for programming.

• • As these chips have to be designed from the root level they are of high cost per unit.
  • ASIC have larger time to market margin.

ASIC vs FPGA

The difference between ASIC and FPGA includes the following.

Thus, this is all about an overview of Application Specific Integrated Circuit. The invention of ASIC has caused a tremendous change in the way electronics are used. We use ASIC in our daily life in the form of various applications. Which applications of ASIC have you came across? What type of ASIC you have worked with?