8085 Microprocessor Pin Diagram and Its Description

The 8085 microprocessor is one kind of semiconductor device synchronized by the CLK (clock). This processor can be built with electronic logic circuits that are fabricated using the technologies like VLSI (very large scale integration) or LSI (large scale integration). The main function of the microprocessor is to perform several functions as well as decisions making for changing the series of program implementation. In computers, a central processing unit will be executed on single or additional circuit boards to perform the computing tasks. There are different types of microprocessors available in the market like the CPU, comprises the logic circuitry, control unit, and it can be separated into three segments like ALU, control unit and a register array.

What is 8085 Microprocessor?

The 8085 microprocessor is an 8-bit general purpose processor that can deal with the memory of 64K Byte. This microprocessor consists of 40-pins as well as works with +5V power supply. This processor can be work at a 3MHz of maximum frequency. This processor is available in three versions such as 8085 AH, 8085 AH1, and 8085 AH2 which are designed with HMOS technology. The highly developed versions use 20% of the power supply. The CLK frequencies of the versions of this processor are 8085 A- 3 MHz, 8085AH-3 MHz, 8085 AH2-5 MHz, and 8085 AH1-6 MHz.

8085 Microprocessor Pin Configuration

The 40 pins of the microprocessor can be divided into six groups such as address bus, data bus, control signals & status signals; power supply & frequency, externally started signals and serial input/output ports.

Address Bus (A8-A15)

The address bus pins are ranges from A8 to A15 and these are mainly applicable to the most considerable memory address bit.

Address Bus (or) Data Bus (AD0-AD7)

The address bus pins or data bus pins are ranges from AD0 to AD7, and these pins are applicable for LSB (least significant bits) of the address bus in the primary apparatus CLK cycle as well as employed as a data bus for second clock cycle & third clock cycle.
A CLK cycle can be designed as, the time in use among two oscillator’s nearby pulses, or simply it can refer to zero volts. Here the first clock is the primary transition of pulse ranges from 0V to 5V & then reaches back to 0V.

Address Latch Enable (ALE)

Basically, ALE assists in de-multiplexing the data bus as well as low order address. This will go high throughout the primary clock cycle as well as allows the address bits with low order. The address bus with low order is added for memory otherwise any exterior latch.

Status Signal (IO/M)

The status signal IO/M resolves whether the address is intended for memory or input/output. When the address is high then the address of the address bus is used for the devices of input/output devices. When the address is low then the address of the address bus is used for the memory.

Status Signals (S0-S1)

The status signals S0, S1 gives different functions as well as status based on their status.

• When the S0, S1 are 01 then the operation will be HALT.
• the S0, S1 is 10 then the operation will be WRITE
• When the S0, S1 is 10 then the operation will be READ
• When the S0, S1 are 11 then the operation will be FETCH

Active Low Signal (RD)

The RD is an energetic low signal and an operation is executed whenever the indication goes small, and it is used for controlling the microprocessor READ operation. When RD pin goes small then the 8085 microprocessor understands the information from I/O device or memory.

Active Low Signal (WR)

This is an energetic low signal, and it controls the microprocessor’s write operations. Whenever WR pin goes small, then the information will be written to the I/O device or memory.

READY

The READY pin is employed with the 8085 microprocessor for ensuring whether a device is set for accepting or transferring data. A device may be an A/D converter or LCD display, etc. These devices are associated with the 8085 microprocessor with the READY-pin. When this pin is high, the device is prepared for transferring the information, if it is not then the microprocessor stays until this pin goes high.

HOLD

The HOLD pin specifies when any device is demanding the employ of address as well as a data bus. The two devices are LCD as well as A/D converter. Assume that if A/D converter is employing the address bus as well as a data bus. When LCD desires the utilize of both the buses by providing HOLD signal, subsequently the microprocessor transmits the control signal toward the LCD after that the existing cycle will be ended. When the LCD procedure is over, then the control signal is transmitted reverse to A/D converter.

HLDA

This is the response signal of HOLD, and it specifies whether this signal is obtained or not obtained. After the implementation of HOLD demand, this signal will go low.

INTR

This is an interrupt signal, and the priority of this among the interrupts is low. This signal can be allowed or not allowed by the software. When INTR pin goes high then the 8085 microprocessor completes the instruction of current which is being executed and then recognizes the INTR signal and progresses it.

INTA

When the 8085 microprocessor gets an interrupt signal, then it should be recognized. This will be done by INTA. As a result, when the interrupt will be obtained then INTA will go high.

RST 5.5, RST 6.5, RST 7.5

These pins are the restart maskable interrupts or Vectored Interrupts, used to insert an inner restart function repeatedly. All these interrupts are maskable, they can be allowed or not allowed by using programs.

TRAP

Along with the 8085 microprocessor interrupts, TRAP is a non-maskable interrupt, and it doesn’t allow or stopped by a program. TRAP has the maximum precedence between the interrupts. The priority order from maximum to low includes TRAP, RST 5.5, RST 6.5, RST 7.5, and INTR.

RESET IN

RESET IN pin is used to reset the program counter toward zero and rearranges interrupt enable as well as HLDA flip-flops (FFs). The central processing unit is detained in RST condition till this pin is high. But the registers as well as flags won’t get damaged apart from instruction register.

RST (RESET) OUT

RESET OUT pin specifies that the central processing unit has been rearranged with RST IN.

X1 X2

X1, X2 terminals that are associated with the exterior oscillator for generating the required as well as appropriate operation of a clock.

CLK

Sometimes it is compulsory to generate CLK o/PS from 8085 microprocessors so they can be used in favor of other peripherals or else other digital integrated circuits. This is offered with CLK pin. Its frequency is continually similar because the frequency at which the microprocessor works.

SID

This is a serial i/p data, and the information on this pin is uploaded into the 7th-bit of the accumulator while RIM (Read Interrupt Mask) instruction is performed. RIM verifies the interrupt whether it is covered or not covered.

SOD

This is the serial o/p data, and the data on this pin sends its output toward the 7th-bit of the accumulator whenever an instruction of SIM is performed.

VSS and VCC

VSS is a ground pin whereas Vcc is +5v pin. Therefore the 8085 pin diagram, as well as signals, are discussed in detail.

Thus, this is all about the 8085 microprocessor. From the above information finally, we can conclude that the actual name of this processor is 8085A. This processor is an NMOS device and consists of thousands of transistors. Here is a question for you, what is the function of Level Triggered Interrupt in 8085 microprocessor?